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SVA: The Power of Assertions in SystemVerilog

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SVA: The Power of Assertions in SystemVerilog

Author

Eduard Cerny; Surrendra Dudani; John Havlicek; Dmitry Korchemny

Year of Publication

2nd ed. 2015

Publisher

Springer International Publishing

Pages

XIX, 590

Language

en

ISBN

9783319071381, 9783319071398, 3319071386

ARI Id

1664384846811

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Topics
System design