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Home > Embedded Systems Specification and Design Languages: Selected Contributions from FDL’07 > Software Real-Time Resource Modeling
Embedded Systems Specification and Design Languages: Selected Contributions from FDL’07 |
Eugenio Villar
Springer Netherlands
Embedded Systems Specification and Design Languages: Selected Contributions from FDL’07
Software Real-Time Resource Modeling
Authors

Frédéric Thomas; Sébastien Gérard; Jérôme Delatour; François Terrier

ARI Id

1664185810968_682486

Access

Not Available Free

Pages

169-182

DOI

10.1007/978-1-4020-8297-9_12

Chapter URL

https://rd.springer.com/chapter/10.1007/978-1-4020-8297-9_12

Table of Contents of Book
Showing 1 to 20 of 20 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
i-ix
How Different Are Esterel and SystemC
Jens Brandt; Klaus Schneider
3-13
Timed Asynchronous Circuits Modeling and Validation Using SystemC
Cédric Koch-Hofer; Marc Renaudin
15-29
On Construction of Cycle Approximate Bus TLMs
Martin Radetzki; Rauf Salimi Khaligh
31-43
Combinatorial Dependencies in Transaction Level Models
Robert Guenzel; Wolfgang Klingauf; James Aldis
45-58
An Integrated SystemC Debugging Environment
Frank Rogin; Christian Genz; Rolf Drechsler; Steffen Rülke
59-71
Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques
Daniel Große; Hernan Peraza; Wolfgang Klingauf; Rolf Drechsler
73-86
SystemC-Based Simulation of the MICAS Architecture
Dragos Truscan; Kim Sandström; Johan Lilius; Ivan Porres
87-103
Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC
F. Herrera; E. Villar; C. Grimm; M. Damm; J. Haase
107-121
An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations
Leran Wang; Chenxu Zhao; Tom J. Kazmierski
123-136
Mixed-Level Modeling Using Configurable MOS Transistor Models
Jürgen Weber; Andreas Lemke; Andreas Lehmler; Mario Anton; Sorin A. Huss
137-152
Modeling AADL Data Communications with UML MARTE
Charles André; Frédéric Mallet; Robert de Simone
155-168
Software Real-Time Resource Modeling
Frédéric Thomas; Sébastien Gérard; Jérôme Delatour; François Terrier
169-182
Model Transformations from a Data Parallel Formalism Towards Synchronous Languages
Huafeng Yu; Abdoulaye Gamatié; Eric Rutten; Jean-Luc Dekeyser
183-198
UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation
Per Andersson; Martin Höst
199-209
An Enhanced SystemC UML Profile for Modeling at Transaction-Level
S. Bocchio; E. Riccobene; A. Rosti; P. Scandurra
211-226
SC2 StateCharts to SystemC: Automatic Executable Models Generation
Marcello Mura; Marco Paolieri
227-239
Asynchronous On-Line Monitoring of Logical and Temporal Assertions
K. Morin-Allory; L. Fesquet; B. Roustan; D. Borrione
243-253
Transactor-Based Formal Verification of Real-Time Embedded Systems
D. Karlsson; P. Eles; Z. Peng
255-270
A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set
Martin Schickel; Martin Oberkönig; Martin Schweikert; Hans Eveking
271-275
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 20 entries
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