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Home > Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping: Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992. Selected Papers > A highly parallel FPGA-based machine and its formal verification
Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping: Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992. Selected Papers |
Herbert Grünbacher; Reiner W. Hartenstein
Springer Berlin Heidelberg
Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping: Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992. Selected Papers
A highly parallel FPGA-based machine and its formal verification
Authors

Paul Shaw; George Milne

ARI Id

1664276808734_1032391

Access

Not Available Free

Pages

162-173

DOI

10.1007/3-540-57091-8_41

Chapter URL

https://rd.springer.com/chapter/10.1007/3-540-57091-8_41

Table of Contents of Book
Showing 1 to 20 of 25 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
Overview of complex array-based PLDs
Günter Biehl
1-10
Technologies and utilization of Field Programmable Gate Arrays
Jouni Isoaho; Arto Nummela; Hannu Tenhunen
11-25
Some considerations on Field Programmable Gate Arrays and their impact on system design
Alberto Sangiovanni-Vincentelli
26-34
SRAM-based FPGAs ease system verification
Bradly K. Fawcett
35-43
MONTAGE: An FPGA for synchronous and asynchronous circuits
Scott Hauck; Gaetano Borriello; Steven Burns; Carl Ebeling
44-51
ORCA: A new architecture for high-performance FPGAs
D. Hill; B. Britton; B. Oswald; N. -S. Woo; S. Singh; C. -T. Chen et al.
52-60
Patching method for lookup-table type FPGA's
Masahiro Fujita; Yuji Kukimoto
61-70
Automatic one-hot re-encoding for FPGAs
Dave Allen
71-77
Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays
Li-Fei Wu; Marek A. Perkowski
78-87
Self-organizing Kohonen maps for FPGA placement
David C. Blight; Robert D. McLeod
88-95
High level synthesis in an FPGA-based computer aided prototyping environment
P. Poechmueller; H. -J. Herpel; M. Glesner; F. Longsen
96-105
New application of FPGAs to programmable digital communication circuits
Naohisa Ohta; Kazuhisa Yamada; Akihiro Tsutsui; Hiroshi Nakada
106-111
FPGA based logic synthesis of squarers using VHDL
Georg Kempa; Peter Jung
112-123
Optimized fuzzy controller architecture for field programmable gate arrays
Hartmut Surmann; Ansgar Ungering; Karl Goser
124-133
A real-time kernel — Rapid prototyping with VHDL and FPGAs
Lennart Lindh; Klaus Müller-Glaser; Hans Rauch; Frank Stanischewski
134-145
JAPROC — A 8 bit micro controller design and its test environment
Herbert Grünbacher; Alexander Jaud
146-151
Chameleon: A workstation of a different colour
Beat Heeb; Cuno Pfister
152-161
A highly parallel FPGA-based machine and its formal verification
Paul Shaw; George Milne
162-173
FPGA based self-test with deterministic test patterns
Arno Kunzmann
174-182
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 25 entries
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