Search from the table of contents of 2.5 million books
Advanced Search (Beta)

Algorithms and Architectures for Parallel Processing: ICA3PP 2016 Collocated Workshops: SCDT, TAPEMS, BigTrust, UCER, DLMCS, Granada, Spain, December 14-16, 2016, Proceedings |
Springer International Publishing
Algorithms and Architectures for Parallel Processing: ICA3PP 2016 Collocated Workshops: SCDT, TAPEMS, BigTrust, UCER, DLMCS, Granada, Spain, December 14-16, 2016, Proceedings

A Dataflow IR for Memory Efficient RIPL Compilation to FPGAs
Authors

ARI Id

1664701889557_2801161

Access

Not Available Free

Pages

174-188

DOI

10.1007/978-3-319-49956-7_14

Chapter URL

https://rd.springer.com/chapter/10.1007/978-3-319-49956-7_14

Loading...
Table of Contents of Book
Showing 1 to 20 of 37 entries
Chapters/HeadingsAuthor(s)PagesInfo
I-XXV
1-1
3-17
18-29
30-42
43-61
62-75
76-90
91-104
105-105
107-114
115-124
125-135
136-145
146-155
157-157
159-173
174-188
189-189
191-200
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 37 entries
Similar Books
Loading...
Similar Chapters
Loading...
Similar Thesis
Loading...

Similar News

Loading...
Similar Articles
Loading...
Similar Article Headings
Loading...