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Home > Parallel Algorithms and Architectures for DSP Applications > Design of Asynchronous Parallel Architectures

Parallel Algorithms and Architectures for DSP Applications |
Springer US
Parallel Algorithms and Architectures for DSP Applications

Design of Asynchronous Parallel Architectures
Authors

ARI Id

1664819148425_3646561

Access

Not Available Free

Pages

191-224

DOI

10.1007/978-1-4615-3996-4_8

Chapter URL

https://rd.springer.com/chapter/10.1007/978-1-4615-3996-4_8

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