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Home > Hardware and Software: Verification and Testing: 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014, Proceedings > Supervisory Control of Discrete-Event Systems via IC3
Hardware and Software: Verification and Testing: 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014, Proceedings |
Eran Yahav
Springer International Publishing
Hardware and Software: Verification and Testing: 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014, Proceedings
Supervisory Control of Discrete-Event Systems via IC3
Authors

Mohammad Reza Shoaei; Laura Kovács; Bengt Lennartson

ARI Id

1664837295731_3722806

Access

Not Available Free

Pages

252-266

DOI

10.1007/978-3-319-13338-6_19

Chapter URL

https://rd.springer.com/chapter/10.1007/978-3-319-13338-6_19

Table of Contents of Book
Showing 1 to 20 of 23 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
Using Coarse-Grained Abstractions to Verify Linearizability on TSO Architectures
John Derrick; Graeme Smith; Lindsay Groves; Brijesh Dongol
1-16
Enhancing Scenario Quality Using Quasi-Events
Yoav Katz; Eitan Marcus; Avi Ziv
17-29
Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems
Georges Morbé; Christian Miller; Christoph Scholl; Bernd Becker
30-47
DynaMate: Dynamically Inferring Loop Invariants for Automatic Full Functional Verification
Juan Pablo Galeotti; Carlo A. Furia; Eva May; Gordon Fraser; Andreas Zeller
48-53
Generating Modulo-2 Linear Invariants for Hardware Model Checking
Gadi Aleksandrowicz; Alexander Ivrii; Oded Margalit; Dan Rasin
54-67
Suraq — A Controller Synthesis Tool Using Uninterpreted Functions
Georg Hofferek; Ashutosh Gupta
68-74
Synthesizing Finite-State Protocols from Scenarios and Requirements
Rajeev Alur; Milo Martin; Mukund Raghothaman; Christos Stergiou; Stavros Tripakis; Abhishek Udupa
75-91
Automatic Error Localization for Software Using Deductive Verification
Robert Könighofer; Ronald Toegl; Roderick Bloem
92-98
Generating JML Specifications from Alloy Expressions
Daniel Grunwald; Christoph Gladisch; Tianhai Liu; Mana Taghdiri; Shmuel Tyszberowicz
99-115
Assume-Guarantee Abstraction Refinement Meets Hybrid Systems
Sergiy Bogomolov; Goran Frehse; Marius Greitschus; Radu Grosu; Corina Pasareanu; Andreas Podelski et al.
116-131
Handling TSO in Mechanized Linearizability Proofs
Oleg Travkin; Heike Wehrheim
132-147
Partial Quantifier Elimination
Eugene Goldberg; Panagiotis Manolios
148-164
Formal Verification of 800 Genetically Constructed Automata Programs: A Case Study
Mikhail Lukin; Maxim Buzdalov; Anatoly Shalyto
165-170
A Framework to Synergize Partial Order Reduction with State Interpolation
Duc-Hiep Chu; Joxan Jaffar
171-187
Reduction of Resolution Refutations and Interpolants via Subsumption
Roderick Bloem; Sharad Malik; Matthias Schlaipfer; Georg Weissenbacher
188-203
Read, Write and Copy Dependencies for Symbolic Model Checking
Jeroen Meijer; Gijs Kant; Stefan Blom; Jaco van de Pol
204-219
Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams
Angelo Gargantini; Paolo Vavassori
220-235
Formal Verification of Secure User Mode Device Execution with DMA
Oliver Schwarz; Mads Dam
236-251
Supervisory Control of Discrete-Event Systems via IC3
Mohammad Reza Shoaei; Laura Kovács; Bengt Lennartson
252-266
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 23 entries
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