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Home > Cryptographic Hardware and Embedded Systems -- CHES 2011: 13th International Workshop, Nara, Japan, September 28 -- October 1, 2011, Proceedings > Lightweight and Secure PUF Key Storage Using Limits of Machine Learning
Cryptographic Hardware and Embedded Systems -- CHES 2011: 13th International Workshop, Nara, Japan, September 28 -- October 1, 2011, Proceedings |
Bart Preneel; Tsuyoshi Takagi
Springer Berlin Heidelberg
Cryptographic Hardware and Embedded Systems -- CHES 2011: 13th International Workshop, Nara, Japan, September 28 -- October 1, 2011, Proceedings
Lightweight and Secure PUF Key Storage Using Limits of Machine Learning
Authors

Meng-Day (Mandel) Yu; David M’Raihi; Richard Sowell; Srinivas Devadas

ARI Id

1664895047659_3968385

Access

Not Available Free

Pages

358-373

DOI

10.1007/978-3-642-23951-9_24

Chapter URL

https://rd.springer.com/chapter/10.1007/978-3-642-23951-9_24

Table of Contents of Book
Showing 1 to 20 of 35 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
An Exploration of Mechanisms for Dynamic Cryptographic Instruction Set Extension
Philipp Grabher; Johann Großschädl; Simon Hoerder; Kimmo Järvinen; Dan Page; Stefan Tillich et al.
1-16
FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control
Mehrdad Majzoobi; Farinaz Koushanfar; Srinivas Devadas
17-32
Generic Side-Channel Countermeasures for Reconfigurable Devices
Tim Güneysu; Amir Moradi
33-48
Improved Collision-Correlation Power Analysis on First Order Protected AES
Christophe Clavier; Benoit Feix; Georges Gagnerot; Mylène Roussellet; Vincent Verneuil
49-62
Higher-Order Glitches Free Implementation of the AES Using Secure Multi-party Computation Protocols
Emmanuel Prouff; Thomas Roche
63-78
Protecting AES with Shamir’s Secret Sharing Scheme
Louis Goubin; Ange Martinelli
79-94
A Fast and Provably Secure Higher-Order Masking of AES S-Box
HeeSeok Kim; Seokhie Hong; Jongin Lim
95-107
Software Implementation of Binary Elliptic Curves: Impact of the Carry-Less Multiplier on Scalar Multiplication
Jonathan Taverne; Armando Faz-Hernández; Diego F. Aranha; Francisco Rodríguez-Henríquez; Darrel Hankerson; Julio López
108-123
High-Speed High-Security Signatures
Daniel J. Bernstein; Niels Duif; Tanja Lange; Peter Schwabe; Bo-Yin Yang
124-142
To Infinity and Beyond: Combined Attack on ECC Using Points of Low Order
Junfeng Fan; Benedikt Gierlichs; Frederik Vercauteren
143-159
Random Sampling for Short Lattice Vectors on Graphics Cards
Michael Schneider; Norman Göttert
160-175
Extreme Enumeration on GPU and in Clouds
Po-Chun Kuo; Michael Schneider; Özgür Dagdelen; Jan Reichelt; Johannes Buchmann; Chen-Mou Cheng et al.
176-191
Modulus Fault Attacks against RSA-CRT Signatures
Éric Brier; David Naccache; Phong Q. Nguyen; Mehdi Tibouchi
192-206
Breaking Mifare DESFire MF3ICD40: Power Analysis and Templates in the Real World
David Oswald; Christof Paar
207-222
Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-Box
Mathieu Renauld; Dina Kamel; François-Xavier Standaert; Denis Flandre
223-239
Thwarting Higher-Order Side Channel Analysis with Additive and Multiplicative Maskings
Laurie Genelle; Emmanuel Prouff; Michaël Quisquater
240-255
Extractors against Side-Channel Attacks: Weak or Strong?
Marcel Medwed; François-Xavier Standaert
256-272
Standardization Works for Security Regarding the Electromagnetic Environment
Tetsuya Tominaga
273-273
Meet-in-the-Middle and Impossible Differential Fault Analysis on AES
Patrick Derbez; Pierre-Alain Fouque; Delphine Leresteux
274-291
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 35 entries
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