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Home > Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing: 10th International Conference, FPL 2000 Villach, Austria, August 27-30, 2000 Proceedings > Compiling Applications for ConCISe: An Example of Automatic HW/SW Partitioning and Synthesis
Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing: 10th International Conference, FPL 2000 Villach, Austria, August 27-30, 2000 Proceedings |
Reiner W. Hartenstein; Herbert Grünbacher
Springer Berlin Heidelberg
Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing: 10th International Conference, FPL 2000 Villach, Austria, August 27-30, 2000 Proceedings
Compiling Applications for ConCISe: An Example of Automatic HW/SW Partitioning and Synthesis
Authors

Bernardo Kastrup; Jeroen Trum; Orlando Moreira; Jan Hoogerbrugge; Jef van Meerbergen

ARI Id

1664977381034_4312812

Access

Not Available Free

Pages

695-706

DOI

10.1007/3-540-44614-1_74

Chapter URL

https://rd.springer.com/chapter/10.1007/3-540-44614-1_74

Table of Contents of Book
Showing 1 to 20 of 103 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
I-XVII
The Rising Wave of Field Programmability
Tsugio Makimoto
1-6
Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS
S. Govindarajan; R. Vemuri
7-18
A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization
Johan Ditmar; Kjell Torkelsson; Axel Jantsch
19-28
A Compiler Directed Approach to Hiding Configuration Latency in Chameleon Processors
Xinan Tang; Manning Aalsma; Raymond Jou
29-38
Reconfigurable Network Processors Based on Field Programmable System Level Integrated Circuits
Marios Iliopoulos; Theodore Antonakopoulos
39-47
Internet Connected FPL
Hamish Fallside; Michael J. S. Smith
48-57
Field Programmable Communication Emulation and Optimization for Embedded System Design
Frank-Michael Renner; Jürgen Becker; Manfred Glesner
58-67
FPGA-Based Emulation: Industrial and Custom Prototyping Solutions
Helena Krupnova; Gabriele Saucier
68-77
FPGA-Based Prototyping for Product Definition
Rainer Kress; Andreas Pyttel; Alexander Sedlmeier
78-86
Implementation of Virtual Circuits by Means of the FIPSOC Devices
E. Cantó; J. M. Moreno; J. Cabestany; I. Lacadena; J. M. Insenser
87-95
Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT
Jörn Gause; Peter Y. K. Cheung; Wayne Luk
96-105
A Self-Reconfigurable Gate Array Architecture
Reetinder Sidhu; Sameer Wadhwa; Alessandro Mei; Viktor K. Prasanna
106-120
Multitasking on FPGA Coprocessors
H. Simmler; L. Levinson; R. Männer
121-130
Design Visualisation for Dynamically Reconfigurable Systems
Milan Vasilko
131-140
Verification of Dynamically Reconfigurable Logic
David Robinson; Patrick Lysaght
141-150
Design of a Fault Tolerant FPGA
T. Bartzick; M. Henze; J. Kickler; K. Woska
151-156
Real-Time Face Detection on a Configurable Hardware System
Rob McCready
157-162
Multifunctional Programmable Single-Board CAN Monitoring Module
Petr Pfeifer
163-168
Self-Testing of Linear Segments in User-Programmed FPGAs
Pawel Tomaszewicz
169-174
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 103 entries
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