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Home > Advances in Swarm and Computational Intelligence: 6th International Conference, ICSI 2015 held in conjunction with the Second BRICS Congress, CCI 2015, Beijing, China, June 25-28, 2015, Proceedings, Part III > An Efficient Design of a Reversible Fault Tolerant \(n\) -to-2 \(^n\) Sequence Counter Using Nano Meter MOS Transistors
Advances in Swarm and Computational Intelligence: 6th International Conference, ICSI 2015 held in conjunction with the Second BRICS Congress, CCI 2015, Beijing, China, June 25-28, 2015, Proceedings, Part III |
Ying Tan; Yuhui Shi; Fernando Buarque; Alexander Gelbukh; Swagatam Das; Andries Engelbrecht
Springer International Publishing
Advances in Swarm and Computational Intelligence: 6th International Conference, ICSI 2015 held in conjunction with the Second BRICS Congress, CCI 2015, Beijing, China, June 25-28, 2015, Proceedings, Part III
An Efficient Design of a Reversible Fault Tolerant \(n\) -to-2 \(^n\) Sequence Counter Using Nano Meter MOS Transistors
Authors

Md. Shamsujjoha; Sirin Nahar Sathi; Golam Sorwar; Fahmida Hossain; Md. Nawab Yousuf Ali; Hafiz Md. Hasan Babu

ARI Id

1665057847736_4648948

Access

Not Available Free

Pages

455-462

DOI

10.1007/978-3-319-20469-7_48

Chapter URL

https://rd.springer.com/chapter/10.1007/978-3-319-20469-7_48

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