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Home > VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers > Deadlock Detection in Digital Microfluidics Biochip Droplet Routing
VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers |
S. Rajaram; N.B. Balamurugan; D. Gracia Nirmala Rani; Virendra Singh
Springer Nature Singapore
VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers
Deadlock Detection in Digital Microfluidics Biochip Droplet Routing
Authors

Jyotiranjan Swain; Sumanta Pyne

ARI Id

1665166688309_5120269

Access

Not Available Free

Pages

242-253

DOI

10.1007/978-981-13-5950-7_21

Chapter URL

https://rd.springer.com/chapter/10.1007/978-981-13-5950-7_21

Table of Contents of Book
Showing 1 to 20 of 70 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
I-XVIII
Front Matter
1-1
Efficient Hardware-Software Codesigns of AES Encryptor and RS-BCH Encoder
M. Mohamed Asan Basiri; Sandeep K. Shukla
3-15
High Level Synthesis and Implementation of Cryptographic Algorithm in AHIR Platform
Abhimanniu Raveendran; Sanjay Dhok; Rajendra Patrikar
16-27
A Hardware Accelerator for Convolutional Neural Network Using Fast Fourier Transform
S. Kala; Babita R. Jose; Debdeep Paul; Jimson Mathew
28-36
Reconfigurable VLSI-Architecture of Multi-radix Maximum-A-Posteriori Decoder for New Generation of Wireless Devices
Rahul Shrestha; Ashutosh Sharma
37-48
Design of High Speed 5: 2 and 7: 2 Compressor Using Nanomagnetic Logic
Shantanu Agarwal; G. Harish; S. Balamurugan; R. Marimuthu
49-60
A Comparative Exploration About Approximate Full Adders for Error Tolerant Applications
M. Priyadharshni; S. Kumaravel
61-74
Front Matter
75-75
A PVT Insensitive Low-Power Differential Ring Oscillator
Nishtha Wadhwa; Pydi Ganga Bahubalindruni; Sujay Deb
77-87
Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power
Prateek Gupta; Shubham Kumar; Zia Abbas
88-99
A 31 ppm/ \(^{\circ }\) C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; N. Yassine; B. Naresh Kumar Reddy
100-108
Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region
Vineysarathi Kokkula; Akash Joshi; Raghvendra Deshmukh
109-120
CMOS Implementations of Rectified Linear Activation Function
P. Priyanka; G. K. Nisarga; S. Raghuram
121-129
Voltage Level Adapter Design for High Voltage Swing Applications in CMOS Differential Amplifier
Ashfakh Ali; Arpan Jain; Zia Abbas
130-139
Layout Design of X-Band Low Noise Amplifier for Radar Applications
I. Stefigraf; S. Rajaram
140-156
Front Matter
157-157
A Novel Approach to Detect Hardware Malware Using Hamming Weight Model and One Class Support Vector Machine
P. Saravanan; B. M. Mehtre
159-172
Detecting Hardware Trojans by Reducing Rarity of Transitions in ICs
Tapobrata Dhar; Surajit Kumar Roy; Chandan Giri
173-185
Enhanced Logical Locking for a Secured Hardware IP Against Key-Guessing Attacks
R. Sree Ranjani; M. Nirmala Devi
186-197
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 70 entries
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