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Home > VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers > Dual-Edge Triggered Lightweight Implementation of AES for IoT Security
VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers |
Anirban Sengupta; Sudeb Dasgupta; Virendra Singh; Rohit Sharma; Santosh Kumar Vishvakarma
Springer Nature Singapore
VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers
Dual-Edge Triggered Lightweight Implementation of AES for IoT Security
Authors

Sajid Khan; Neha Gupta; Abhinav Vishvakarma; Shailesh Singh Chouhan; Jai Gopal Pandey; Santosh Kumar Vishvakarma

ARI Id

1665213212395_5391103

Access

Not Available Free

Pages

298-307

DOI

10.1007/978-981-32-9767-8_26

Chapter URL

https://rd.springer.com/chapter/10.1007/978-981-32-9767-8_26

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