Chapter: 3 Interfacing between Digital Logic Circuits

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Home > Digital Integrated Circuits: Analysis and Design > 3 Interfacing between Digital Logic Circuits

Digital Integrated Circuits: Analysis and Design |

John E. Ayers

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Digital Integrated Circuits: Analysis and Design

3 Interfacing between Digital Logic Circuits

Chapter Info

Authors

John E. Ayers

ARI Id

1665868603500_13992946

Access

Not Available Free

Pages

501-528

DOI

10.1201/b12491-15

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Chapters/Headings	Author(s)	Pages	Info
Introduction to Digital Integrated Circuits	John E. Ayers	21-64
Semiconductor Materials	John E. Ayers	65-80
Diodes	John E. Ayers	81-108
Bipolar Junction Transistors	John E. Ayers	109-134
Transistor–Transistor Logic	John E. Ayers	135-226
Emitter-Coupled Logic	John E. Ayers	227-274
Field-Effect Transistors	John E. Ayers	275-306
NMOS Logic	John E. Ayers	307-340
CMOS Logic	John E. Ayers	341-410
0 Low-Power CMOS Logic	John E. Ayers	411-442
1 BiCMOS Logic	John E. Ayers	443-468
2 GaAs Direct-Coupled FET Logic	John E. Ayers	469-500
3 Interfacing between Digital Logic Circuits	John E. Ayers	501-528
4 Interconnect	John E. Ayers	529-562
5 Bistable Circuits	John E. Ayers	563-596
6 Digital Memories	John E. Ayers	597-626
7 Design and Layout	John E. Ayers	627-654
8 Integrated Circuit Packages	John E. Ayers	655-692
Chapters/Headings	Author(s)	Pages	Info

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