Search from the table of contents of 2.5 million books
Advanced Search (Beta)
Home > EDA for IC System Design, Verification, and Testing > Micro-Architectural Power Estimation and Optimization
EDA for IC System Design, Verification, and Testing |
Ahmed Jerraya; Louis Scheffer; Enrico Macii; Luciano Lavagno; Grant Martin; Ray Turner; Robert F. Damiano; Stephen A. Edwards; Kwang-Ting(Tim) Cheng; Marcello Coppola; Limor Fix; Steven Howard Leibson; Prabhat Mishra; Bozena Kaminska; Bernd Koenemann; Gaurav Singh; Alain Clouard; John Sanguinetti; Franz E. Marschner; Marco Di Natale; Ralph H. Otten; John Wilson; Miltos D. Grammatikakis; Wayne Wolf; Rajesh Gupta; Sumit Gupta; Sandeep Shukla; Vivek Tiwari; Renu Mehra; Massimo Poncino; Shuvra S. Bhattacharyya; Mike Bershteyn; Raul Camposano; Iuliana Bacivarov; Nikil Dutt; Kenneth L. McMillan; Li-Chung Wang; Harry D. Foster; Jean-Philippe Strassen; Frank Ghenassia; Laurent Maillet-Contoz; Joseph Tobin Buck; Naehyuck Chang
Routledge
EDA for IC System Design, Verification, and Testing
Micro-Architectural Power Estimation and Optimization
Authors

Enrico Macii; Renu Mehra; Massimo Poncino

ARI Id

1666065567163_14614219

Access

Not Available Free

Pages

13-1-13-34

DOI

10.1201/9781420007947-13

Table of Contents of Book
Chapters/HeadingsAuthor(s)PagesInfo
Loading...
Chapters/HeadingsAuthor(s)PagesInfo
Similar Books
Similar Chapters
Similar Thesis

Similar News

Similar Articles
Similar Article Headings