Search from the table of contents of 2.5 million books
Advanced Search (Beta)
Home > Cryptographic Hardware and Embedded Systems - CHES 2000: Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings > A Dynamic FPGA Implementation of the Serpent Block Cipher
Cryptographic Hardware and Embedded Systems - CHES 2000: Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings |
Çetin K. Koç; Christof Paar
Springer Berlin Heidelberg
Cryptographic Hardware and Embedded Systems - CHES 2000: Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings
A Dynamic FPGA Implementation of the Serpent Block Cipher
Authors

Cameron Patterson

ARI Id

1674219656244_1868964

Access

Not Available Free

Pages

141-155

DOI

10.1007/3-540-44499-8_10

Chapter URL

https://rd.springer.com/chapter/10.1007/3-540-44499-8_10

Table of Contents of Book
Showing 1 to 20 of 29 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
I-XI
Software Implementation of Elliptic Curve Cryptography over Binary Fields
Darrel Hankerson; Julio López Hernandez; Alfred Menezes
1-24
Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA
Souichi Okada; Naoya Torii; Kouichi Itoh; Masahiko Takenaka
25-40
A High-Performance Reconfigurable Elliptic Curve Processor for GF(2m)
Gerardo Orlando; Christof Paar
41-56
Fast Implementation of Elliptic Curve Defined over GF(pm) on CalmRISC with MAC2424 Coprocessor
Jae Wook Chung; Sang Gyoo Sim; Pil Joong Lee
57-70
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
Adi Shamir
71-77
Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards
Rita Mayer-Sommer
78-92
Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems
M. Anwar Hasan
93-108
A Timing Attack against RSA with the Chinese Remainder Theorem
Werner Schindler
109-124
A Comparative Study of Performance of AES Final Candidates Using FPGAs
Andreas Dandalis; Viktor K. Prasanna; Jose D.P. Rolim
125-140
A Dynamic FPGA Implementation of the Serpent Block Cipher
Cameron Patterson
141-155
A 12 Gbps DES Encryptor/Decryptor Core in an FPGA
Steve Trimberger; Raymond Pang; Amit Singh
156-163
A 155 Mbps Triple-DES Network Encryptor
Herbert Leitold; Wolfgang Mayerwieser; Udo Payer; Karl Christian Posch; Reinhard Posch; Johannes Wolkerstorfer
164-174
An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture
James Goodman; Anantha Chandrakasan
175-190
High-Speed RSA Hardware Based on Barret’s Modular Reduction Method
Johann Großschädl
191-203
Data Integrity in Hardware for Modular Arithmetic
Colin D. Walter
204-215
A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals
Takehiko Kato; Satoru Ito; Jun Anzai; Natsume Matsuzaki
216-228
How to Explain Side-Channel Leakage to Your Kids
David Naccache; Michael Tunstall
229-230
On Boolean and Arithmetic Masking against Differential Power Analysis
Jean-Sébastien Coron; Louis Goubin
231-237
Using Second-Order Power Analysis to Attack DPA Resistant Software
Thomas S. Messerges
238-251
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 29 entries
Similar Books
Similar Chapters
Similar Thesis

Similar News

Similar Articles
Similar Article Headings