Search from the table of contents of 2.5 million books
Advanced Search (Beta)
Home > Formal Methods in Computer-Aided Design: 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings > Variable Reuse for Efficient Image Computation
Formal Methods in Computer-Aided Design: 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings |
Alan J. Hu; Andrew K. Martin
Springer Berlin Heidelberg
Formal Methods in Computer-Aided Design: 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings
Variable Reuse for Efficient Image Computation
Authors

Zijiang Yang; Rajeev Alur

ARI Id

1674219948562_4218237

Access

Not Available Free

Pages

430-444

DOI

10.1007/978-3-540-30494-4_30

Chapter URL

https://rd.springer.com/chapter/10.1007/978-3-540-30494-4_30

Table of Contents of Book
Showing 1 to 20 of 32 entries
Chapters/HeadingsAuthor(s)PagesInfo
Front Matter
Challenges in System-Level Design
Wayne Wolf
1-5
Generating Fast Multipliers Using Clever Circuits
Mary Sheeran
6-20
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
Thao Dang; Alexandre Donzé; Oded Maler
21-36
A Methodology for the Formal Verification of FFT Algorithms in HOL
Behzad Akbarpour; Sofiène Tahar
37-51
A Functional Approach to the Formal Specification of Networks on Chip
Julien Schmaltz; Dominique Borrione
52-66
Proof Styles in Operational Semantics
Sandip Ray; J. Strother Moore
67-81
Integrating Reasoning About Ordinal Arithmetic into ACL2
Panagiotis Manolios; Daron Vroon
82-97
Combining Equivalence Verification and Completion Functions
Mark D. Aagaard; Vlad C. Ciubotariu; Jason T. Higgins; Farzad Khalvati
98-112
Synchronization-at-Retirement for Pipeline Verification
Mark D. Aagaard; Nancy A. Day; Robert B. Jones
113-127
Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs
Laurent Arditi; Gerard Berry; Michael Kishinevsky
128-143
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
In-Ho Moon; Carl Pixley
144-158
Scalable Automated Verification via Expert-System Guided Transformations
Hari Mony; Jason Baumgartner; Viresh Paruthi; Robert Kanzelman; Andreas Kuehlmann
159-173
Simple Yet Efficient Improvements of SAT Based Bounded Model Checking
Emmanuel Zarpas
174-185
Simple Bounded LTL Model Checking
Timo Latvala; Armin Biere; Keijo Heljanko; Tommi Junttila
186-200
QuBE++: An Efficient QBF Solver
Enrico Giunchiglia; Massimo Narizzano; Armando Tacchella
201-213
Bounded Probabilistic Model Checking with the Murφ Verifier
Giuseppe Della Penna; Benedetto Intrigila; Igor Melatti; Enrico Tronci; Marisa Venturini Zilli
214-229
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
Mohammad Awedh; Fabio Somenzi
230-244
Bounded Verification of Past LTL
Alessandro Cimatti; Marco Roveri; Daniel Sheridan
245-259
A Hybrid of Counterexample-Based and Proof-Based Abstraction
Nina Amla; Ken L. McMillan
260-274
Chapters/HeadingsAuthor(s)PagesInfo
Showing 1 to 20 of 32 entries
Similar Books
Similar Chapters
Similar Thesis

Similar News

Similar Articles
Similar Article Headings