"A Multi-Level Memory System Architecture for High-Performance DSP Applications"

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Book	Author(s)	Year	Publisher
Software architecture for a multi-level real-time system	Omer Korkut	1998	Naval Postgraduate School;Available from National Technical Information Service
A High Performance Architecture for Prolog	T.P. Dobry	1990	Springer US
High-performance graphics system architecture: a methodology for design and evaluation	Ingrid Carlbom	1984	UMI Research Press
High-Speed DSP and Analog System Design	Thanh T. Tran	2010	Springer US
High-Speed DSP and Analog System Design	Thanh T.Tran	2010	Springer
Biocomposites for High-Performance Applications	Dipa Ray	2017	Woodhead Publishing
High Performance Memory Systems	Haldun Hadimioglu	2004	Springer New York;Imprint;Springer
High Performance Memory Systems	Haldun Hadimioglu; Jeffrey Kuskin; Josep Torrellas; David Kaeli; Ashwini Nanda	2004	Springer New York
Arithmetic Circuits for DSP Applications	Pramod Kumar Meher; Thanos Stouraitis	2017	Wiley-IEEE Press
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip	Zheng Wang; Anupam Chattopadhyay	1st ed. 2018	Springer Nature Singapore
High-performance computer architecture	Harold S. Stone	1990	Addison-Wesley Pub. Co.
High-Performance Networks for Multimedia Applications	Andre Danthine; Otto Spaniol; Wolfgang Effelsberg; Domenico Ferrari	1999	Springer US
High Performance Computing for Geospatial Applications	Wenwu Tang; Shaowen Wang	1st ed. 2020	Springer International Publishing
System-level Techniques for Analog Performance Enhancement	Bang-Sup Song	1st ed. 2016	Springer International Publishing
DSP Architecture Design Essentials	Dejan Marković; Robert W. Brodersen	2012	Springer US
High-Level Language Computer Architecture	Yaohan Chu	1975	Academic Press
Additives for High Performance Applications: Chemistry and Applications	Johannes Karl Fink	2016	John Wiley & Sons
DSP System Design: Complexity Reduced IIR Filter Implementation for Practical Applications	Artur Krukowski; Izzet Kale	2003	Springer US
Controlling Comitology: Accountability in a Multi-Level System	G. Brandsma	2013	Palgrave Macmillan UK
Memory Management for Synthesis of DSP Software	Praveen K. Murthy; Shuvra S. Bhattacharyya	2006	Routledge
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A Multi-Level Memory System Architecture for High-Performance DSP Applications	S. Agarwala, C. Fuoco and T. Anderson /[et al.]	Innovative architecture for future generation high-performance processors and systems: 1999 International Workshop on Innovative Architecture (IWIA'99): November 1-3, 1999, Maui, Hawaii /	Veidenbaum, Alex.; Nakashima, Hiroshi.	[2000], ©2000.	IEEE Computer Society,
A Scalable High-Performance DMA Architecture for DSP Applications	D. Comisky, S. Agarwala and C. Fuoco	Innovative architecture for future generation high-performance processors and systems: 1999 International Workshop on Innovative Architecture (IWIA'99): November 1-3, 1999, Maui, Hawaii /	Veidenbaum, Alex.; Nakashima, Hiroshi.	[2000], ©2000.	IEEE Computer Society,
High Performance and Flexible Data Path Architecture for DSP Applications	D. Naga Divya; M. V. Ganeswara Rao; Rajesh K. Panakala; A. M. Prasad	Microelectronics, Electromagnetics and Telecommunications: Proceedings of ICMEET 2017	Jaume Anguera; Suresh Chandra Satapathy; Vikrant Bhateja; K.V.N. Sunitha	1st ed. 2018	Springer Nature Singapore
GAUT: A High-Level Synthesis Tool for DSP Applications	Philippe Coussy; Cyrille Chavet; Pierre Bomel; Dominique Heller; Eric Senn; Eric Martin	High-Level Synthesis: from Algorithm to Digital Circuit	Philippe Coussy; Adam Morawiec	2008	Springer Netherlands
4 Multi-Level Memory Architecture		Neuromorphic Circuits for Nanoscale Devices	Pinaki Mazumder; Yalcin Yilmaz; Idongesit Ebong; Woo Hyung Lee	2018	River Publishers
High-level Design Tools for Complex DSP Applications	Yang Sun; Guohui Wang; Bei Yin; Joseph R. Cavallaro; Tai Ly	DSP for Embedded and Real-Time Systems	Oshana; Robert	2012	Newnes
MDSP: A High-Performance Low-Power DSP Architecture	F. Pessolano; J. Kessels; A. Peeters	Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation: 12th International Workshop, PATMOS 2002, Seville, Spain, September 11 - 13, 2002	Bertrand Hochet; Antonio J. Acosta; Manuel J. Bellido	2002	Springer Berlin Heidelberg
High-Performance System Applications	Richard X. Gu; Khaled M. Sharaf; Mohamed I. Elmasry	High-Performance Digital VLSI Circuit Design	Richard X. Gu; Khaled M. Sharaf; Mohamed I. Elmasry	1996	Springer US
The MARS High-Level DSP Synthesis System	Ching-Yi Wang; Keshab K. Parhi	VLSI Design Methodologies for Digital Signal Processing Architectures	Magdy A. Bayoumi	1994	Springer US
High-Level System Software Architecture		Building service-aware networks: the next-generation WAN/MAN; [a thorough introduction to the ASR 1000 series router]	Khan, Muhammad Afaq	2009;2010	Cisco Press
2. High Performance Memory Applications		High performance memories: new architecture DRAMs and SRAMs: evolution and function /	Prince, Betty.	[1996], ©1996.	John Wiley,
A Sophisticated Architecture for Evolutionary Multiobjective Optimization Utilizing High Performance DSP	Quanxi Li; Jingsong He	Evolvable Systems: From Biology to Hardware: 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings	Sanyou Zeng	2007	Springer Berlin Heidelberg
2561 The Multi-DSP Architecture		Embedded Systems Handbook	Richard Zurawski	2005	CRC Press
High Performance Arithmetic for DSP Systems	G. A. Jullien	VLSI Signal Processing Technology	Magdy A. Bayoumi; Earl E. Swartzlander	1994	Springer US
High Performance Arithmetic for DSP Syste		VLSI Signal Processing Technology	Magdy A. Bayoumi (auth.), Magdy A. Bayoumi, Earl E. Swartzlander Jr. (eds.)	1994	Springer US
A Multi-Tier Architecture for High-Performance Data Mining	Ralf Rantzau; Holger Schwarz	Datenbanksysteme in Büro, Technik und Wissenschaft: 8. GI-Fachtagung Freiburg im Breisgau, 1. –3. März 1999	Alejandro P. Buchmann	1999	Springer Berlin Heidelberg
163 DSP Processor Memory Architecture		Digital Signal Processing	S. Salivahanan	2014	Mc Graw Hill India
A Multi DSP Computer Engine for Vision Applications	T.-T. Tay and B.-H. Chua	Advances in computing techniques: algorithms, databases, and parallel processing /	Imai, H.; Wong, W. F.; Loe, K. F.	[1995], ©1995.	World Scientific,
High Performance Architecture Synthesis System	Phillip Duncan; Shobana Swamy; Steve Sprouse; Daniel Potasz; Rajeev Jain; William Cammack et al.	VLSI Design Methodologies for Digital Signal Processing Architectures	Magdy A. Bayoumi	1994	Springer US
Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors	T. Yamauchi, L. Hammond and K. Olukotun	Seventeenth Conference on Advanced Research in VLSI: proceedings: September 15-16, 1997, Ann Arbor, Michigan /	Brown, Richard B.; Ishii, Alexander T.	[1997], ©1997.	IEEE Computer Society,
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