"Development of At-speed Interconnect Test to Capture Marginal Open Defect on FPGA"

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Book	Author(s)	Year	Publisher
Hands-on Experience with Altera FPGA Development Boards	Jivan S. Parab; Rajendra S. Gad; G.M. Naik	1st ed. 2018	Springer India
Design for AT-Speed Test, Diagnosis and Measurement	Benoit Nadeau-Dostie	2000	Springer US
Electronic capture of well test data	Alberta Energy and Utilities Board	1999	Alberta Energy and Utilities Board
Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability	Mohammad Tehranipoor	2008	Springer US
Asynchronous System-on-Chip Interconnect	John Bainbridge	2002	Springer London
Designing High-Speed Interconnect Circuits: An Introduction for Signal Integrity Engineers	Dennis Miller	August 1, 2004	Intel Press
Planning and development of marginal areas	Seamus Grimes	1992	Centre for Development Studies, University College Galway
High speed digital system design: a handbook of interconnect theory and design practices /	Hall, Stephen H.; Hall, Garrett W.; McCall, James A.	[2000], ©2000.	Wiley,
At speed	Mark Cavendish	2013
New approaches to the development of marginal regions: 8th International Seminar on Marginal Regions, in Association with University College, Galway	International Seminar on Marginal Regions (8th 1985 University College, Galway)	1986	University College, Galway?]
Handbook of Test Development	Suzanne Lane; Mark R. Raymond; Thomas M. Haladyna	2015	Routledge
Handbook of test development	Thomas M. Haladyna; Jamal Abedi	2006	Erlbaum
Defect	Will Weaver	July 24, 2007	Farrar, Straus and Giroux (BYR)
Next-Generation High-Speed Satellite Interconnect: Disclosing the SpaceFibre Protocol – A System Perspective	Pietro Nannipieri; Gianmarco Dinelli; Luca Dello Sterpaio; Antonino Marino; Luca Fanucci	1st ed. 2021	Springer International Publishing
Men at speed	Kenneth Rudeen	1961	Holt, Rinehart and Winston
Men at speed.	Kenneth Rudeen	1961	Holt, Rinehart and Winston
Champions at speed	Richard Corson	1979	Dodd, Mead
FPGA Architecture	Ian Kuon, Russell Tessier, Jonathan Rose	2008	Now Publishers Inc
Development Economics: Inframarginal Versus Marginal Analysis	Jeffrey Sachs and Xiaokai Yang	2000	Blackwell
Guide to FPGA Implementation of Arithmetic Functions	Jean-Pierre Deschamps; Gustavo D. Sutter; Enrique Cantó	2012	Springer Netherlands
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Chapter	Author(s)	Book	Book Authors	Year	Publisher
Development of At-speed Interconnect Test to Capture Marginal Open Defect on FPGA	Fahmy Hafriz bin Mohamed Sultan; Zuraini binti Dahari; Yien Yien Koh; Neil Da Cunha; Jia Tian Ng	9th International Conference on Robotic, Vision, Signal Processing and Power Applications: Empowering Research and Innovation	Haidi Ibrahim; Shahid Iqbal; Soo Siang Teoh; Mohd Tafir Mustaffa	1st ed. 2017	Springer Nature Singapore
Exploration of Pipelined FPGA Interconnect Structures	A. Sharma, K. Compton, C. Ebeling and S. Hauck	FPGA 2004: ACM/SIGDA Twelfth ACM International Symposium on Field-Programmable Gate Arrays, Monterey Beach Hotel, Monterey, California, USA: February 22-24, 2004 /	ACM International Symposium on Field-Programmable Gate Arrays (12th 2004 Monterey, Calif.)	[2004], ©2004.	Association for Computing Machinery,
High-Speed Serial Interconnect	Adam Healey	Optical Networking Standards: A Comprehensive Guide for Professionals	Khurram Kazi	2006	Springer US
High-Speed FibreChannel Interconnect		Clusters for high availability: a primer of HP solutions	Weygant, Peter S; Pisoni, Jill(Editor)	2001	Prentice Hall PTR
marginal test	Martin H. Weik	Computer Science and Communications Dictionary	Martin Weik	2001	Springer US
Blind Speed Defect		The Pearson Question Bank for Electronics & Communication Engineers (PSUs/GATE/IES)	Satish K. Karna	2012	Pearson Education
Physical Design of FPGA Interconnect to Prevent Information Leakage	Sumanta Chaudhuri; Sylvain Guilley; Philippe Hoogvorst; Jean-Luc Danger; Taha Beyrouthy; Alin Razafindraibe et al.	Reconfigurable Computing: Architectures, Tools, and Applications: 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings	Roger Woods; Katherine Compton; Christos Bourganis; Pedro C. Diniz	2008	Springer Berlin Heidelberg
Design of FPGA Interconnect for Multilevel Metalization	R. Rubin and A. DeHon	FPGA: ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays, Monterey Beach Hotel, Monterey, California, USA: February 23-25, 2003 /	Trimberger, Stephen,; Tessier, Russell G.	[2003], ©2003.	ACM Press,
Capture Test		Lexikon der Medizinischen Laboratoriumsdiagnostik	Axel M. Gressner; Torsten Arndt	3. Aufl. 2019	Springer Berlin Heidelberg
Oscilloscope Capture Speed		The Hardware Hacking Handbook: Breaking Embedded Security with Hardware Attacks	Jasper van Woudenberg, Colin O'Flynn	2021	No Starch Press
Oscilloscope Capture Speed		The Hardware Hacking Handbook. Breaking Embedded Security With Hardware Attacks	Jasper van Woudenberg, Colin O’Flynn	2022	No Starch Press
Faster-Than-At-Speed Test	Mohammad Tehranipoor; Ke Peng; Krishnendu Chakrabarty	Test and Diagnosis for Small-Delay Defects	Mohammad Tehranipoor; Ke Peng; Krishnendu Chakrabarty	2012	Springer New York
210 Interconnect Test Structures		Circuit and Interconnect Design for RF and High Bit-Rate Applications	H. Veenstra, J. Long	2008	Springer
Test to show a defect		Extreme Programming Installed	Ron Jeffries, Ann Anderson, Chet Hendrickson	2001	Addison-Wesley
The High Speed IPC Interconnect		Oracle 9i Real Application Clusters. Concepts	Rawles J. W.	2001
Speed Test		Business data networks and security	Panko, Julia L.; Panko, Raymond R	2014;2015	Pearson
Speed Test		Campbell's Operative Orthopaedics, 4-Volume Set	Frederick M. Azar, James H. Beaty, S. Terry Canale	2020	Elsevier
Speed test	music by Arthur Sullivan	Thoroughly modern Millie: original Broadway cast recording /	Tesori, Jeanine,; Tesori, Jeanine,; Scanlan, Dick,; Morris, Richard,; Ralph, Sheryl Lee,; Harris, Harriet Sansom,; Kudisch, Marc,; Creel, Gavin,; Christian, Angela,; Leung, Ken,; Jue, Francis,; Nathan, Anne L.,; Foster, Sutton,; Rafter, Michael; Besterman, Douglas.; Burns, Ralph.; Chase, David; Tesori, Jeanine.; Herbert, Victor,; Herbert, Victor,; Tesori, Jeanine.
Speed test		Thoroughly modern Millie: original Broadway cast recording.	Tesori, Jeanine.; Scanlan, Dick,; Foster, Sutton.; Ralph, Sheryl Lee.	p2002.	RCA,
Interconnect synthesis for reconfigurable multi-FPGA architectures	Vinoo Srinivasan; Shankar Radhakrishnan; Ranga Vemuri; Jeff Walrath	Parallel and Distributed Processing: 11th IPPS/SPDP’99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing San Juan, Puerto Rico, USA, April 12–16, 1999 Proceedings	José Rolim; Frank Mueller; Albert Y. Zomaya; Fikret Ercal; Stephan Olariu; Binoy Ravindran; Jan Gustafsson;	1999	Springer Berlin Heidelberg
Chapter	Author(s)	Book	Book Authors	Year	Publisher

Showing 1 to 20 of 100 entries

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