"Hardware implementation and performance evaluation of synchronous and GALS processor on FPGA"

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Book	Author(s)	Year	Publisher
FPGA-BASED Hardware Accelerators	Iouliia Skliarova; Valery Sklyarov	1st ed. 2019	Springer International Publishing
High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation	Ayan Palchaudhuri; Rajat Subhra Chakraborty	2016	Springer India
Beginning FPGA: Programming Metal: Your brain on hardware	Aiken Pang; Peter Membrey	1st ed.	Apress
Hardware virtualization on a coarse-grained reconfigurable processor	Christian Plessl	2006	Shaker
Advanced FPGA Design: Architecture, Implementation, and Optimization	Steve Kilts	2007	Wiley-IEEE Press
Guide to FPGA Implementation of Arithmetic Functions	Jean-Pierre Deschamps; Gustavo D. Sutter; Enrique Cantó	2012	Springer Netherlands
PC hardware and systems implementation	William J. Birnes	1989	McGraw-Hill
Hardware Implementation of Intelligent Systems	Horia-Nicolai Teodorescu; Abraham Kandel	2001	Physica-Verlag HD
Processor Microarchitecture: An Implementation Perspective	Antonio Gonzalez; Fernando Latorre; Grigorios Magklis		Springer International Publishing
Processor microarchitecture: an implementation perspective	Antonio González	2011	Morgan & Claypool
FPGA-based Implementation of Signal Processing Systems 2e	Roger Woods	2017	John Wiley & Sons
Web Proxy Cache Replacement Strategies: Simulation, Implementation, and Performance Evaluation	Hala ElAarag	2013	Springer London
Embedded Systems: Hardware, Design and Implementation	Krzysztof Iniewski	2012	John Wiley & Sons
Hardware Implementation of Finite-Field Arithmetic	Jean-Pierre Deschamps	2009	McGraw-Hill Professional
Robotic Exploration and Landmark Determination: Hardware-Efficient Algorithms and FPGA Implementations	K. Sridharan; Panakala Rajesh Kumar	2008	Springer Berlin Heidelberg
A Practical Guide for Simulation and FPGA Implementation of Digital Design	Bekkay Hajji; Adel Mellit; Loubna Bouselham	1st ed. 2022	Springer Nature Singapore
The effect of restrictions on relative processor speeds to differences in efficiency between synchronous and asynchronous systems.	Paul G. Spirakis	1982	Courant Institute of Mathematical Sciences, New York University
Attitude study on performance evaluation	Hirohide Hinomoto	1982	College of Commerce and Business Administration, Bureau of Economic and Business Research, University of Illinois at Urbana-Champaign
Attitude study on performance evaluation	Hirohide Hinomoto	1982	College of Commerce and Business Administration, Bureau of Economic and Business Research, University of Illinois at Urbana-Champaign
Computer-hardware evaluation of mathematical functions	Amos R. Omondi	2015	Imperial College Press
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Chapter	Author(s)	Book	Book Authors	Year	Publisher
Artificial Neural Networks Processor – A Hardware Implementation Using a FPGA	Pedro Ferreira; Pedro Ribeiro; Ana Antunes; Fernando Morgado Dias	Field Programmable Logic and Application: 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings	Jürgen Becker; Marco Platzner; Serge Vernalde	2004	Springer Berlin Heidelberg
Symmetric Cryptography and Hardware Chip Implementation on FPGA	Priyanshi Vishnoi; S. L. Shimi; Adesh Kumar	Intelligent Communication, Control and Devices: Proceedings of ICICCD 2018	Sushabhan Choudhury; Ranjan Mishra; Raj Gaurav Mishra; Adesh Kumar	1st ed. 2020	Springer Nature Singapore
A Hardware Implementation of PRAM and its Performance Evaluation	M. Imai; Y. Hayakawa; H. Kawanaka; W. Chen; K. Wada; C. D. Castanho et al.	Parallel and Distributed Processing: 15 IPDPS 2000 Workshops Cancun, Mexico, May 1–5, 2000 Proceedings	Jose Rolim	2000	Springer Berlin Heidelberg
Implementation and performance evaluation of an image pre-processing chain on FPGA	Mohamed Akil; Marcelo Alves De Barros	Field-Programmable Logic: Architectures, Synthesis and Applications: 4th International Workshop on Field-Programmable Logic and Applications, FPL' 94, Prague, Czech Republic, September 7 - 9, 1994. Proceedings	Reiner W. Hartenstein; Michal Z. Servit	1994	Springer Berlin Heidelberg
Asynchronous and Synchronous SVPWM Design and Implementation Based on FPGA	Xue Bai; Ruichang Qiu; Shaoliang Huang; Lijun Diao	Proceedings of the 2015 International Conference on Electrical and Information Technologies for Rail Transportation: Electrical Traction	Limin Jia; Zhigang Liu; Yong Qin; Rongjun Ding; Lijun Diao	1st ed. 2016	Springer Berlin Heidelberg
Hardware Implementation of RBF Neural Network on FPGA Coprocessor	Zhi-gang Yang; Jun-lei Qian	Information Computing and Applications, Part I: International Conference, ICICA 2010, Tangshan, China, October 15-18, 2010. Proceedings, Part I	Rongbo Zhu; Yanchun Zhang; Baoxiang Liu; Chunfeng Liu	2010	Springer Berlin Heidelberg
Performance Evaluation of Processor Design	L. J. Zeckendorf	GI. Gesellschaft für Informatik e. V. 2. Jahrestagung: Karlsruhe, 2. –4. Oktober 1972	P. Deussen	1973	Springer Berlin Heidelberg
Hardware Measurements and Their Application on Performance Evaluation in a Processor-Array	R. Klar	Parallel Processes and Related Automata / Parallele Prozesse und damit zusammenhängende Automaten	W. Knödel; Hans Juergen Schneider	1981	Springer Vienna
Performance Efficient NoC Router Implementation on FPGA	Priti Shahane; Ujwala Kshirsagar	Smart Trends in Computing and Communications: Proceedings of SmartCom 2021	Yu-Dong Zhang; Tomonobu Senjyu; Chakchai So-In; Amit Joshi	1st ed. 2022	Springer Nature Singapore
Design and FPGA Implementation of 32-Point FFT Processor	Amit Kumar; Adesh Kumar; Aakanksha Devrari; Shraddha Singh	Proceeding of International Conference on Intelligent Communication, Control and Devices: ICICCD 2016	Rajesh Singh; Sushabhan Choudhury	1st ed. 2017	Springer Nature Singapore
The Method of Hardware Implementation of Fuzzy Systems on FPGA	Andrzej Przybył; Meng Joo Er	Artificial Intelligence and Soft Computing: 15th International Conference, ICAISC 2016, Zakopane, Poland, June 12-16, 2016, Proceedings, Part I	Leszek Rutkowski; Marcin Korytkowski; Rafał Scherer; Ryszard Tadeusiewicz; Lotfi A. Zadeh; Jacek M. Zurada	1st ed. 2016	Springer International Publishing
Hardware Overhead vs. Performance of Matrix Multiplication on FPGA	Ju Seong Lee; Sang Don Kim; Yeong Seob Jeong; Seung Eun Lee	Proceedings of the Fourth International Conference on Signal and Image Processing 2012 (ICSIP 2012): Volume 2	Mohan S; S Suresh Kumar	2013	Springer India
Processor Hardware	Terry Critchley	High-Performance IT Services	Terry Critchley	2016	Routledge
CNN-SVM Hybrid Classifier in Hardware Implementation on FPGA		Support-vector Machines: History and Applications	Pooja Saigal (editor)	2021	Nova Science Pub Inc
864 Hardware performance evaluation		ReRAM-based Machine Learning (Computing and Networks)	Hao Yu, Leibin Ni, Sai Manoj Pudukotai Dinakarrao	2021	Institution of Engineering and Technology
Designing of General Purpose 8-Bit RISC Processor and Implementation on FPGA	Divyang Thakkar; S. Balamurugan; R. Marimuthu	Advances in Automation, Signal Processing, Instrumentation, and Control: Select Proceedings of i-CASIC 2020	Venkata Lakshmi Narayana Komanapalli; N. Sivakumaran; Santoshkumar Hampannavar	1st ed. 2021	Springer Nature Singapore
Implementation of a Pipeline Large-FFT Processor Based on the FPGA	Yongkui Ma; Henghao Liang	Communications, Signal Processing, and Systems: Proceedings of the 2017 International Conference on Communications, Signal Processing, and Systems	Qilian Liang; Jiasong Mu; Min Jia; Wei Wang; Xuhong Feng; Baoju Zhang	1st ed. 2019	Springer Nature Singapore
Architecture and FPGA Implementation of a Digit-serial RSA Processor	Alessandro Cilardo; Antonino Mazzeo; Luigi Romano; Giacinto Paolo Saggese	New Algorithms, Architectures and Applications for Reconfigurable Computing	Patrick Lysaght; Wolfgang Rosenstiel	2005	Springer US
Aizup - A Pipelined Processor Design & Implementation on XILINX FPGA Chip	Y. Li and W. Chu	Proceedings, IEEE Symposium on FPGAs for Custom Computing Machines, April 17-19, 1996, Napa Valley, California /	Pocek, Kenneth L.; Arnold, Jeffrey M.	[1996], ©1996.	IEEE Computer Society Press,
Enhancing GALS Processor Performance Using Data Classification Based on Data Latency	S. López; O. Garnica; J. M. Colmenar	Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings	Enrico Macii; Vassilis Paliouras; Odysseas Koufopavlou	2004	Springer Berlin Heidelberg
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